1. Field of the Invention
The present invention relates to a differential switching circuit and a digital-to-analog converter. More particularly, the present invention relates to a circuit capable of enhancing the output impedance of a differential switching circuit for a current cell of a current type digital-to-analog converter.
2. Description of the Related Art
In general, a digital-to-analog converter (DAC) receives n-bit digital signals and converts the received n-bit digital signals into analog signals. The DAC is widely applied to various fields, for example, instrumentation devices, automatic controllers, communication devices, imaging devices, and the like.
Recently, research and development has been applied to a current-steering type DAC suitable for a monolithic integrated circuit in accordance with system on a chip (SOC) technology.
Current-steering type DAC technology can be classified into a binary-weighted type and a segment type according to the type of configuration of a constant current source. In the binary-weighted type DAC, the constant current source is in a binary-weighted configuration so that a decoder is not required, thereby simplifying the switching configuration thereof. However, since the binary-weighted type DAC is known to be susceptible to a glitch error and since the size of the transistor of the constant current source may be increased, the chip size may need to be greatly increased, especially for the transistors corresponding to the most significant bit (MSB).
On the contrary, the segment type DAC may be operated in a switching mode with only constant current sources, so that the segment type DAC offers certain advantages such as a simplified operation, monotonicity, high-speed operation, and is operable without a glitch error, etc. However, since the segment type DAC requires a decoder and 2n−1 constant current sources when processing n bits, the configuration of the associated switching circuit is complex and the chip size for designing an integrated circuit may be increased.
In view of the above, a hybrid technique that applies both the binary-weighted method and the segment method to a least significant bit (LSB) and the most significant bit (MSB) of the device, respectively, has been developed. The current-steering type DAC includes a current cell for the constant current source. The current cell includes a differential switching circuit for switching the constant current signal in response to an input digital data signal. An example of a differential switching circuit is disclosed in Korean Laid-Open Patent Application No. 2001-60276 and U.S. Pat. No. 6,100,830.
FIG. 1 is a circuit diagram showing a conventional differential switching circuit. Referring to FIG. 1, a conventional differential switching circuit includes a pair of transistors Q1 and Q2 in a common source configuration that are complementarily switched. A plurality of differential switching circuits is connected to a pair of output terminals POUT and NOUT in parallel. Thus, a current signal (It=ΣIu) that is the sum of unit current signals Iu provided from a differential switching circuit of which a transistor is turned on among the differential switching circuits flows through an output load RL connected to the output terminal POUT, so that a voltage difference of an output voltage VP(=RLP×It) is applied to an output terminal of the active transistors of the differential switching circuits.
Responsive to an input data value, the voltage signal of the output terminal POUT is varied from OV to VFS (full-scale voltage). When a level of the voltage signal at the output terminal increases to the full-scale voltage, transistor Q1 or Q2 operates in the active region (or linear region) after departing from the saturation region, thereby lowering the output impedance of the differential switching circuits in view of the output terminal.
As a result, when the output impedance of the differential switching circuit is lowered, an error may occur in an output current due to variation of the output voltage, thereby lowering the accuracy of the DAC.